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CVE-2024-42279

medium

In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transm…

Vendor / product: Linux — linux kernel

In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer.

CVSS
5.5
5.5 (CVSS v3.1)
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
Severity source: NVD CVSS v3.1 (nvd@nist.gov)
Timeline (UTC)
Published: 2024-08-17 09:15
Modified: 2026-10-30 13:17
NVD status: Modified
Last synced 3 days ago
Verified against the source API 2026-10-30 13:38 UTC
Exploitation
Not listed in CISA KEV (as of last catalog sync)
Absence from KEV does not mean a CVE is not exploited. Exploitation status: unknown (no authoritative evidence in our sources).

Affected products

linux / linux_kernel ≥6.0 <6.6.44, ≥6.7 <6.10.3

Weakness classification (CWE)

NVD-CWE-noinfo

Source: NVD / CISA. “NVD-CWE-Other” and “NVD-CWE-noinfo” mean NVD could not assign a specific weakness.

Mitigation & advisories

Patch / mitigation: https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80
Patch / mitigation: https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75
Patch / mitigation: https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927

References

Data sources

NVD CVE API 2.0 — fetched 2026-10-30 13:38 UTC · record ↗

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